The 720Mhz 8PSK signal currently at 600 Mb/s data rate is amplified, square root of Nyquist filtered, and then routed through automatic gain control circuitry. The AGC output is routed to the Costas Demodulator to produce I and Q outputs and to the symbol synchronizer to produce a baud rate clock. The I and Q signals are processed under control of the baud rate clocks to produce absolute and comparative state estimates and then further processed to produce initial data state estimates. This data is then routed to a modulo eight differential decoder to produce the final three data outputs (D1D2D3). The three data streams and baud rate clock are provided on the rear panel at ECL levels in both two cable differential and single ended formats. Local and remote IEEE 488 monitoring of the demodulator is provided. I and Q test outputs are available on the rear panel.